Senior FPGA Design Engineer

Job Title

Senior FPGA Design Engineer

Degree:

Bachelor, Master

Work Experience:

10-15 years, 16+ years

Travel:

10%

Workplace Types:

Hybrid

Job Description:

Introduction

ASML US, including its affiliates and subsidiaries, bring together the most creative minds in science and technology to develop lithography machines that are key to producing faster, cheaper, more energy-efficient microchips. We design, develop, integrate, market, and service these advanced machines, which enable our customers - the world's leading chipmakers - to reduce the size and increase the functionality of their microchips, which in turn leads to smaller, more powerful consumer electronics. Our headquarters are in Veldhoven, Netherlands, and we have 18 office locations around the United States including main offices in Chandler, Arizona, San Jose and San Diego, California, Wilton, Connecticut, and Hillsboro, Oregon.

Job Mission

As an FPGA design engineer, you will participate in a cross-functional and collaborative team to specify, create custom digital circuit designs, simulate, implement and support hardware testing for ASML's EUV Source.

This position requires access to controlled technology, as defined in the Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require the Company to proceed with candidates who are immediately eligible to access controlled technology.

You must be work authorized in the United States without the need for employer sponsorship.

Job Description

• Responsible for contributing to, and translating requirements, into qualified design solutions.
• Define and execute RTL design, block-level simulations, hardware integration / test throughout the FPGA development process from architecture through volume release.
• Guide a team of FPGA engineers to realize the solution, to include deliverable assignment and peer-reviewing HDL output.
• Documentation of design solution using standardized templates and guidelines.
• Collaborate in a complex and fast-paced environment with FPGA design, verification and test engineers as well as adjacent engineering competencies.
• Continually sharpen technical and professional skill-sets through available development programs.
• Other duties as assigned.
• Job description subject to change at any time.

Education and Experience

• BS or higher in EE, CS or related engineering fields.
• Minimum of eight (8) years of experience in FPGA design with demonstrated success in full FPGA development cycles, from requirement decomposition through realization.
• Demonstrated expertise and experience in FPGA design (VHDL) and Module / Multi-Module verification (System Verilog).
• Experience with automated self-checking test bench verification and using UVM framework a plus.
• Ability to complete timing simulation/post route simulation and static timing analysis.
• Strong experience in hardware development tools and IDE for Xilinx devices; additional experience in Altera development tools a plus.
• Ability to utilize lab hardware and IDE cores to debug (ILAs, VIO, SignalTaps, etc.).
• Familiar with SoC, bus topology, AXI, PCIe, PTP, TSN, SRIO and associated IP.
• Familiar with configuration management/version control/build automation.

Skills & Competencies

• Ability to learn and apply new information and/or skills.
• Demonstrated creative problem solving for complex issues.
• Can read and interpret data, information, and documents.
• Track record of completing assignments with attention to detail and high degree of accuracy.
• Proven ability to perform effectively in a demanding environment, within provided timelines, and with changing workloads.
• Results driven; exhibits ownership and accountability.
• Work independently or as part of a team and follow through on assignments with minimal supervision.
• Strong professional communication which is clear and concise.
• Ability to establish and maintain cooperative working relationships with co-workers.

Diversity & Inclusion

ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.

Other Information

• This position is located on-site in San Diego, California. It requires onsite presence to attend in-person work-related events, trainings and meetings and to further ensure teamwork, collaboration and innovation.

• Routinely required to sit; walk; talk; hear; use hands to keyboard, finger, handle, and feel; stoop, kneel, crouch, twist, reach, and stretch. Occasionally required to move around the campus.
• Occasionally lift and/or move up to 20 pounds.
• Specific vision abilities required by this job include close vision, color vision, peripheral vision, depth perception, and ability to adjust focus.

• Must be willing to work in a clean room environment, wearing coveralls, hoods, booties, safety glasses and gloves for entire duration of shift.
• While performing the duties of this job, the employee routinely is required to sit; walk; talk; hear; use hands to keyboard, finger, handle, and feel; stoop, kneel, crouch, twist, reach, and stretch.

EOE AA M/F/Veteran/Disability

Potential candidates will meet the education and experience requirements provided on the above job description and excel in completing the listed responsibilities for this role. All candidates receiving an offer of employment must successfully complete a background check band any other tests that may be required.